Profibus Master/Slave comms

Revver

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Apr 2011
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Hi all

I am having trouble with Profibus master/slave comms, i have 2 x 315PN/DP cpu's that i have configured as master and slave. I have set the ports to DP, with node 2 master, node 3 slave. In the properties i have set the input & output fields to both be 6. I have put the configured cpu in the Profibus network in the master configuration and i have coupled it. All downloads ok with no errors.

I have configured a small program to prove communications where i trigger an input in the master to set Q6.0 in the master, this sets I6.0 in the slave which then triggers a local output in the slave which works fine. I also use I6.0 to trigger Q6.0 in the slave which should then set I6.0 in the master to set another local output.The input does not trigger, it seems that i am only getting comms from the master to the slave but nothing from slave to master.

I know i can use Profinet to do this faster but i want to prove the profibus comms

Can anyone help please!!
 
Check the input addresses. In some cases the cases the I/O registers are located at a different point to where you think they are, or you have two I/O devices using the same registers.

Go online and check if it works when you force the tags.
 
Hi Chris

I have forced the input and goes true and this sets the output.
I have swapped the master slave CPU's around, set different addresses and still no feedback from the slave output to the master input.
 
It sounds like there is a mapping issue between the slave outputs and master inputs.

Try moving the input ranges on the master and the slave. Pick a big number so that it is away from any other I/O and see if that solves the issue. I would also look for offsets in the properties that could be incorrectly configured.
 
Hi Kalle

Thanks for replying

All fault let's are off. It's working fine from master to slave.

I have changed addressing areas and makes no difference
 
Since you have no BF in both PLCs, the DP comms almost certainly works.
Observe the slave CPU online. Does Q6.0 follow I6.0 ?
In the slave CPU, does anything else write to Q6.0, QB6, QW6, QD4, QD6 ?
Observe the master CPU online. Does I6.0 follow Q6.0 of the slave ?
In the master CPU, does anything else write to I6.0, IB6, IW6, ID4, ID6 ?

The word "trigger" sounds suspect to me.
In the slave it should be as simple as
A I6.0
= Q6.0
 

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